Amorphous silicon thin film transistors (TFTs) are now widely used in many large area electronic applications, such as displays, printers, scanners and electronic copiers. However, the electronic characteristics of these devices tend to change slowly with time, depending on stress conditions and temperature. This process occurs because the external stresses shift the Fermi level from its equilibrium (midgap) position and in response to changes in Fermi level position a-Si:H creates defects which oppose the shift of the Fermi level in an attempt to restore the Fermi level back to the midgap, i.e. the most stable thermodynamic state. This process is known as equilibration.
In conventional usage, the equilibration effect causes a threshold voltage shift in standard a-Si:H transistors when these devices are stressed by the application of a gate electrode potential causing electrons or holes to accumulate within the channel. Equilibration also causes an output characteristic shift in high voltage a-Si:H transistors when these devices are stressed in their OFF condition. Both of these shifts are the result of increased numbers of defects in the active a-Si:H layer after the Fermi level has returned to the midgap position once the applied stress is removed. Over time these extra defects will anneal away at a rate determined by temperature and the Fermi level position.
In FIG. 1 there is shown a standard amorphous silicon thin film transistor 10 in the ON linear condition. Transistor 10 comprises a gate electrode 12, a gate dielectric layer 14, an active charge transport layer 16, source and drain electrodes 18 and 19, and passivation layer 20. When the transistor 10 is turned ON by applying a positive bias to the gate electrode 12, free electrons flow from the source electrode 18 to the drain electrode 19 through the active charge transport layer 16 to form an accumulation channel 21 therein near the interface with the gate dielectric 14. During accumulation the channel 21 becomes more conductive as its Fermi level shifts from midgap toward the conduction band. Because this is not in a stable state, i.e. there are more free and trapped electrons in the active layer 16 than in its equilibrium state, the amorphous semiconductor material equilibrates by generating more defects in the bottom half of the bandgap in an attempt to return the Fermi level to midgap. Then, upon removal of the gate bias (when the transistor is turned OFF), the accumulation channel is eliminated and there is no longer an excess of electrons. However, there will be an excess of defects which will slowly self anneal away.
The above described changes, in response to the electrostatic stressing of the standard amorphous silicon thin film transistor during its normal, intended use, cause a threshold voltage (V.sub.TH) shift, as may be seen in shifting (log)I.sub.DS vs. V.sub.G curves illustrated in FIG. 2. The original transistor characteristics are represented by curve A of FIG. 2. During its ON state, as defects are created to oppose the Fermi level shift, the characteristics may shift to curve B because free electrons, having fallen into the traps, no longer contribute to the current and more charge must be induced into the channel by a higher gate bias in order for the same current to flow. When the gate bias is removed, the charge transport layer again corrects itself by slowly annealing away some of the defects, returning to the characteristics of curve C, and only returning extremely slowly to its original position, A. Thus, a threshold voltage shift, i.e. the difference in gate voltages at which the device will turn ON (V.sub.TH =V.sub.C -V.sub.A), will occur during each cycle. While this shift may not be large for any single ON-OFF cycle; over the lifetime of the device, there is a net drift which may cause the device to exhibit a threshold shift of several volts. To compensate for this undesirable shift, it is possible to overdrive the gate by a margin of several volts.
In FIG. 3 there is shown a known high voltage amorphous silicon thin film transistor 22. The transistor 22 comprises a gate electrode 24, a gate dielectric layer 26, an active charge transport layer 28, a source electrode 30, a drain electrode 32, and a passivation layer 33. A channel in the active layer includes a gated portion L.sub.1 and an ungated, or "drift" portion L.sub.2. As with the low voltage transistor, this device will exhibit a threshold voltage shift due to the effect of the gate bias on the gated portion L.sub.1. Additionally, in the OFF condition of the device, the high drain potential acting on the "drift" portion L.sub.2 sweeps electrons out of that region, with the greatest depletion occuring in that portion of the dead region adjacent to the end of the gate electrode 24. This deep depletion of electrons moves the Fermi level downward toward the valence band, in response to which the amorphous semiconductor material equilibrates by generating more defects in the top half of the bandgap in an attempt to return the Fermi level to midgap. Then, when the transistor is turned ON and this deep depletion is removed, there will be an excess of defects in the top half of the bandgap which oppose the drain potential and requires a higher drain potential to be applied in order for the same amount of current to flow. The excess defects will slowly self anneal away.
The above described changes, in response to the electrostatic stressing of the known high voltage amorphous silicon thin film transistor during its normal, intended use, cause a "V.sub.x shift," as may be seen in the I.sub.DS vs. V.sub.DS curves illustrated in FIG. 4. We define the term "V.sub.x shift" as the difference between the x-axis crossings of the tangents to the inflection point of the several I.sub.DS vs. V.sub.DS curves. The original transistor characteristics are represented by curve E. During the OFF state, when the "drift" region is depleted and defects are generated, the characteristic curve will shift to curve F. This phenomenon is fully described in a copending application, assigned to the same assignee as the present application, entitled "High Voltage Thin Film Transistor With Second Control Electrode" (Hack et al), U.S. Pat. No. 4,984,041, granted Jan. 8, 1991. When the device is ON or is at rest, the active layer again corrects itself by self annealing away some of the excess defects, but as this is a slow process at room temperature it will only return to characteristic curve G. Although it is often possible to work around these shifting characteristics without adverse effects, it would be highly desirable for the device to return to its original characteristics as fast as possible.
Other non-crystalline semiconductor active devices also will exhibit the same or similar response to external perturbations such as electrical bias, elevated temperature and intense illumination. Therefore, it is an object of this invention to provide an electronic device which is highly stable and will exhibit very small, if any, shifts in its characteristics in response to external perturbations.
It is a further object of this invention to accelerate the restoration of the active layer of an electronic device to its original state after changes have occured therein response to external perturbations.